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Since: Dec 06, 2007 Posts: 31
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(Msg. 1) Posted: Thu Dec 13, 2007 4:35 pm
Post subject: Clarifications about AMD TLB L3 bug Archived from groups: comp>sys>ibm>pc>hardware>chips (more info?)
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Since: Apr 22, 2007 Posts: 3
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(Msg. 2) Posted: Fri Dec 14, 2007 6:02 pm
Post subject: Re: Clarifications about AMD TLB L3 bug [Login to view extended thread Info.] Archived from groups: per prev. post (more info?)
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On Dec 14, 4:02 pm, Yousuf Khan <bbb....TakeThisOut@yahoo.com> wrote:
> Robert Myers wrote:
> > A number of assertions have been made here about the AMD TLB L3 Bug:
>
> > 1. Only affects virtualization.
>
> > 2. Is fixed in 64-bit Linux without a significant performance hit.
>
> > 1. TRUTH: AMD, which knew about the bug before the chip was released,
> > falsely made this claim. The bug apparently affects all workloads,
> > potentially resulting in a system freeze.
>
> The truth actually is that it only affects virtualized workloads,
> because the problem occurs when nested page tables are used. Nested page
> tables only are used in virtualization, no other times. AMD never made
> the claim it only affects virtualization, it is actually trying to keep
> that hushed up: I assume because it does not want a virtualization bug
> to be associated with its products since that kind of a reputation would
> be hard to shake off, even if fixed.
It's not clear to me whether that is true or not. Here's the bug:
"The processor operation to change the accessed or dirty bits of a
page translation table entry in the L2 from 0b to 1b may not be
atomic. A small window of time exists where other cached operations
may cause the stale page translation table entry to be installed in
the L3 before the modified copy is returned to the L2. In addition, if
a probe for this cache line occurs during this window of time, the
processor may not set the accessed or dirty bit and may corrupt data
for an unrelated cached operation. The system may experience a machine
check event reporting an L3 protocol error has occurred. In this case,
the MC4 status register (MSR 0000_0410) will be equal to
B2000000_000B0C0F or BA000000_000B0C0F. The MC4 address register (MSR
0000_0412) will be equal to 26h."
I know what a Page Table Entry is, but I'm not sure what a PTTE
is...it sort of sounds like the nested page table. Perhaps someone
who is intimately familiar with the architecture could comment?
> > 2. TRUTH: A fix is available under NDA for RHEL 4 and not otherwise
> > apparently.
>
> >http://techreport.com/discussions.x/13721
>
> >http://techreport.com/discussions.x/13724
>
> How secret can it be if it's open-source?
Really easy, nobody cares enough to sue AMD/RH to get it. It's not
like there are more than 10-20 end users for Barcelona at the moment.
DK >> Stay informed about: Clarifications about AMD TLB L3 bug |
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Since: Dec 06, 2007 Posts: 31
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(Msg. 3) Posted: Fri Dec 14, 2007 6:22 pm
Post subject: Re: Clarifications about AMD TLB L3 bug [Login to view extended thread Info.] Archived from groups: per prev. post (more info?)
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On Dec 14, 7:02 pm, Yousuf Khan <bbb....TakeThisOut@yahoo.com> wrote:
> Robert Myers wrote:
> > A number of assertions have been made here about the AMD TLB L3 Bug:
>
> > 1. Only affects virtualization.
>
> > 2. Is fixed in 64-bit Linux without a significant performance hit.
>
> > 1. TRUTH: AMD, which knew about the bug before the chip was released,
> > falsely made this claim. The bug apparently affects all workloads,
> > potentially resulting in a system freeze.
>
> The truth actually is that it only affects virtualized workloads,
> because the problem occurs when nested page tables are used. Nested page
> tables only are used in virtualization, no other times. AMD never made
> the claim it only affects virtualization, it is actually trying to keep
> that hushed up: I assume because it does not want a virtualization bug
> to be associated with its products since that kind of a reputation would
> be hard to shake off, even if fixed.
>
Discussing AMD with you can be an interesting undertaking:
"In order to better understand this problem, TR spoke with Michael
Saucier, Desktop Product Marketing Manager at AMD. Saucier confirmed
that the TLB erratum can cause the system to hang when the chip is
experiencing high utilization. AMD has stated previously that
virtualization workloads can lead to this problem, but Saucier
clarified that other workloads can trigger system hangs, as well. He
characterized the issue as a race condition in the TLB logic "where
the other guy wins who isn't supposed to win," and said the likelihood
of the erratum causing a system hang is extremely rare."
The report could be factually incorrect, but since I cited something
other than my own impression to support my statement, I'd expect you
to do the same.
You know that I'm not an admirer of AMD, so you won't be surprised
that I think AMD may be mortally wounded. Between the ATI fiasco and
this, AMD is a company with products that no one is going to want to
buy and seems unlikely to survive until it will have products that
someone does want to buy. That AMD is publicly whining about the
pounding its stock price has taken should tell you something. Vendors
who *finally* took a chance on AMD after years of hanging back have
been fried. First there was the lame roadmap. Now this.
What's the difference between this and Intel's botched FDIV bug?
Very, very simple. At the time of the FDIV bug, x86 was for
"peecees," and no one cared if Intel made mistakes that IBM (or DEC or
Sun) never would. Now they do.
> > 2. TRUTH: A fix is available under NDA for RHEL 4 and not otherwise
> > apparently.
>
> >http://techreport.com/discussions.x/13721
>
> >http://techreport.com/discussions.x/13724
>
> How secret can it be if it's open-source?
>
How is part of SUSE kept proprietary?
Robert. >> Stay informed about: Clarifications about AMD TLB L3 bug |
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Since: Dec 17, 2005 Posts: 307
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(Msg. 4) Posted: Fri Dec 14, 2007 7:02 pm
Post subject: Re: Clarifications about AMD TLB L3 bug [Login to view extended thread Info.] Archived from groups: per prev. post (more info?)
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Robert Myers wrote:
> A number of assertions have been made here about the AMD TLB L3 Bug:
>
> 1. Only affects virtualization.
>
> 2. Is fixed in 64-bit Linux without a significant performance hit.
>
> 1. TRUTH: AMD, which knew about the bug before the chip was released,
> falsely made this claim. The bug apparently affects all workloads,
> potentially resulting in a system freeze.
The truth actually is that it only affects virtualized workloads,
because the problem occurs when nested page tables are used. Nested page
tables only are used in virtualization, no other times. AMD never made
the claim it only affects virtualization, it is actually trying to keep
that hushed up: I assume because it does not want a virtualization bug
to be associated with its products since that kind of a reputation would
be hard to shake off, even if fixed.
> 2. TRUTH: A fix is available under NDA for RHEL 4 and not otherwise
> apparently.
>
> http://techreport.com/discussions.x/13721
>
> http://techreport.com/discussions.x/13724
How secret can it be if it's open-source?
Yousuf Khan >> Stay informed about: Clarifications about AMD TLB L3 bug |
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Since: Mar 10, 2004 Posts: 318
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(Msg. 5) Posted: Sat Dec 15, 2007 10:00 am
Post subject: Re: Clarifications about AMD TLB L3 bug [Login to view extended thread Info.] Archived from groups: per prev. post (more info?)
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On Thu, 13 Dec 2007 16:35:26 -0800 (PST), Robert Myers
<rbmyersusa.DeleteThis@gmail.com> wrote:
>A number of assertions have been made here about the AMD TLB L3 Bug:
>
>1. Only affects virtualization.
>
>2. Is fixed in 64-bit Linux without a significant performance hit.
>
>1. TRUTH: AMD, which knew about the bug before the chip was released,
>falsely made this claim. The bug apparently affects all workloads,
>potentially resulting in a system freeze.
>
>2. TRUTH: A fix is available under NDA for RHEL 4 and not otherwise
>apparently.
A number of assertions have been made here by Mr Myers about the AMD
TLB L3 Bug:
1. That a fix is available under NDA for RHEL 4 and not otherwise
apparently.
Truth: Mr Myers, which knew about the openly released fix before the
post was released, falsely made this claim. The fix apparently is
available for all, not requiring a NDA that could potentially result
in an information freeze.
Truth : AMD released the fix publicly without a NDA requirement on 5
Dec, documented on the same day by the same website used by Mr Myers
to cite the two truths above, 8 days before Mr Myer's posting on 13
Dec...
http://www.techreport.com/discussions.x/13742
https://www.x86-64.org/pipermail/discuss/2007-December/010260.html
=P
--
A Lost Angel, fallen from heaven
Lost in dreams, Lost in aspirations,
Lost to the world, Lost to myself >> Stay informed about: Clarifications about AMD TLB L3 bug |
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Since: Dec 06, 2007 Posts: 31
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(Msg. 6) Posted: Sat Dec 15, 2007 10:05 am
Post subject: Re: Clarifications about AMD TLB L3 bug [Login to view extended thread Info.] Archived from groups: per prev. post (more info?)
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On Dec 15, 9:12 am, a?n?g?...@lovergirl.lrigrevol.moc.com (The little
lost angel) wrote:
> On Thu, 13 Dec 2007 16:35:26 -0800 (PST), Robert Myers
>
> <rbmyers... DeleteThis @gmail.com> wrote:
> >A number of assertions have been made here about the AMD TLB L3 Bug:
>
> >1. Only affects virtualization.
>
> >2. Is fixed in 64-bit Linux without a significant performance hit.
>
> >1. TRUTH: AMD, which knew about the bug before the chip was released,
> >falsely made this claim. The bug apparently affects all workloads,
> >potentially resulting in a system freeze.
>
> >2. TRUTH: A fix is available under NDA for RHEL 4 and not otherwise
> >apparently.
>
> A number of assertions have been made here by Mr Myers about the AMD
> TLB L3 Bug:
>
> 1. That a fix is available under NDA for RHEL 4 and not otherwise
> apparently.
>
> Truth: Mr Myers, which knew about the openly released fix before the
> post was released, falsely made this claim. The fix apparently is
> available for all, not requiring a NDA that could potentially result
> in an information freeze.
>
> Truth : AMD released the fix publicly without a NDA requirement on 5
> Dec, documented on the same day by the same website used by Mr Myers
> to cite the two truths above, 8 days before Mr Myer's posting on 13
> Dec...
>
> http://www.techreport.com/discussions.x/13742https://www.x86-64.org/pi...mail/di
>
As I'm sure you know, I wasn't aware of the follow-up article.
Somewhere, there might be a customer who matters who would apply such
an "invasive" patch without support. Who or where that customer might
be is beyond my imagining, except that someone important must have a
bunch of these AMD chips installed somewhere and has no choice but to
take the chance. So,
1. We rushed a chip into production and missed an infrequently-
occurring but potentially disastrous bug.
2. We are now rushing out a patch that purports to fix the bug without
a serious penalty. We told you to trust us about the chip, and it
turns out you shouldn't have. Now we're telling you *not* to trust us
about the patch. Why, exactly, would anyone install the unsupported
patch? Presumably there is a handful of important customers whose
hands are being held. For everyone else, it's just PR.
Robert. >> Stay informed about: Clarifications about AMD TLB L3 bug |
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Since: Oct 16, 2007 Posts: 9
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(Msg. 7) Posted: Tue Dec 18, 2007 4:02 pm
Post subject: Re: Clarifications about AMD TLB L3 bug [Login to view extended thread Info.] Archived from groups: per prev. post (more info?)
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Robert Myers wrote:
> As I'm sure you know, I wasn't aware of the follow-up article.
Don't use such lame excuses.
> Somewhere, there might be a customer who matters who would apply such
> an "invasive" patch without support. Who or where that customer might
> be is beyond my imagining, except that someone important must have a
> bunch of these AMD chips installed somewhere and has no choice but to
> take the chance. So,
>
> 1. We rushed a chip into production and missed an infrequently-
> occurring but potentially disastrous bug.
>
> 2. We are now rushing out a patch that purports to fix the bug without
> a serious penalty. We told you to trust us about the chip, and it
> turns out you shouldn't have. Now we're telling you *not* to trust us
> about the patch. Why, exactly, would anyone install the unsupported
> patch? Presumably there is a handful of important customers whose
> hands are being held. For everyone else, it's just PR.
Nonsense. Go, check how many errata there was in the Core Duo. Just see the
example from the same site, from the comments from the article you quoted...
http://techreport.com/forums/viewtopic.php?t=43352&view=next&sid=a3a9f...93e91c1
rgds
\SK >> Stay informed about: Clarifications about AMD TLB L3 bug |
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Since: Oct 16, 2007 Posts: 9
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(Msg. 8) Posted: Tue Dec 18, 2007 4:02 pm
Post subject: Re: Clarifications about AMD TLB L3 bug [Login to view extended thread Info.] Archived from groups: per prev. post (more info?)
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Robert Myers wrote:
> What's the difference between this and Intel's botched FDIV bug?
> Very, very simple. At the time of the FDIV bug, x86 was for
> "peecees," and no one cared if Intel made mistakes that IBM (or DEC or
> Sun) never would. Now they do.
What a nonsense!
You know what is the difference?
There is a workaround for this AMD bug, like there are for Inte's TLB bus in
their Core2 Duos. Both AMD & Intel fixes reduce the perofrmance a bit.
You know what is the difference? There was no fix for FDIV bug at all.
Reducing performance slightly or not. The buggy stuff was hard coded and not
bypassable. Intel has learned from that disaster and AMD has too.
>>>2. TRUTH: A fix is available under NDA for RHEL 4 and not otherwise
>>>apparently.
>>
>>>http://techreport.com/discussions.x/13721
>>
>>>http://techreport.com/discussions.x/13724
>>
>>How secret can it be if it's open-source?
>>
> How is part of SUSE kept proprietary?
Go buy a little clue and read how GPL works. Then you'll know that parts
which are not derived work of the GPL Linux kernel can be proprietary and
how those which are dervied work (as such patch has to) can not.
BTW. The patch is public, so the point is moot, you're just spreading
unfounded FUD.
rgds
\SK >> Stay informed about: Clarifications about AMD TLB L3 bug |
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Since: Dec 06, 2007 Posts: 31
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(Msg. 9) Posted: Tue Dec 18, 2007 7:19 pm
Post subject: Re: Clarifications about AMD TLB L3 bug [Login to view extended thread Info.] Archived from groups: per prev. post (more info?)
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On Dec 18, 1:29 pm, Sebastian Kaliszewski
<s....RemoveThis@get.it.off.to.reply.informa.pl> wrote:
> Robert Myers wrote:
> > What's the difference between this and Intel's botched FDIV bug?
> > Very, very simple. At the time of the FDIV bug, x86 was for
> > "peecees," and no one cared if Intel made mistakes that IBM (or DEC or
> > Sun) never would. Now they do.
>
> What a nonsense!
>
> You know what is the difference?
> There is a workaround for this AMD bug, like there are for Inte's TLB bus in
> their Core2 Duos. Both AMD & Intel fixes reduce the perofrmance a bit.
>
The workaround costs anywhere from 5% (one of AMD's numbers) to 50%
(other's numbers, naturally) in performance. You think that's
acceptable? AMD bought it on this one. Perhaps AMD should have had
you go out and address investors. You'd have been a big hit.
Your comment that "both AMD & Intel fixes reduce the perofrmance [sic]
a bit" is like Yousuf coming out with the item about Intel's bug right
after the AMD bug, as if they canceled one another out. Go look at
the financial press, and see if anyone but AMDroids (or anyone that
matters) reads it that way.
> You know what is the difference? There was no fix for FDIV bug at all.
> Reducing performance slightly or not. The buggy stuff was hard coded and not
> bypassable. Intel has learned from that disaster and AMD has too.
>
> >>>2. TRUTH: A fix is available under NDA for RHEL 4 and not otherwise
> >>>apparently.
>
> >>>http://techreport.com/discussions.x/13721
>
> >>>http://techreport.com/discussions.x/13724
>
> >>How secret can it be if it's open-source?
>
> > How is part of SUSE kept proprietary?
>
> Go buy a little clue and read how GPL works. Then you'll know that parts
> which are not derived work of the GPL Linux kernel can be proprietary and
> how those which are dervied work (as such patch has to) can not.
>
> BTW. The patch is public, so the point is moot, you're just spreading
> unfounded FUD.
>
If you can't be bothered to read the entire thread, then I can't be
bothered to respond.
Robert. >> Stay informed about: Clarifications about AMD TLB L3 bug |
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Since: Dec 06, 2007 Posts: 31
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(Msg. 10) Posted: Tue Dec 18, 2007 7:23 pm
Post subject: Re: Clarifications about AMD TLB L3 bug [Login to view extended thread Info.] Archived from groups: per prev. post (more info?)
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On Dec 18, 1:22 pm, Sebastian Kaliszewski
<s... DeleteThis @get.it.off.to.reply.informa.pl> wrote:
> Robert Myers wrote:
> > As I'm sure you know, I wasn't aware of the follow-up article.
>
> Don't use such lame excuses.
>
When you've grown up, you'll know better than to talk to people that
way, especially to people you don't know.
> > Somewhere, there might be a customer who matters who would apply such
> > an "invasive" patch without support. Who or where that customer might
> > be is beyond my imagining, except that someone important must have a
> > bunch of these AMD chips installed somewhere and has no choice but to
> > take the chance. So,
>
> > 1. We rushed a chip into production and missed an infrequently-
> > occurring but potentially disastrous bug.
>
> > 2. We are now rushing out a patch that purports to fix the bug without
> > a serious penalty. We told you to trust us about the chip, and it
> > turns out you shouldn't have. Now we're telling you *not* to trust us
> > about the patch. Why, exactly, would anyone install the unsupported
> > patch? Presumably there is a handful of important customers whose
> > hands are being held. For everyone else, it's just PR.
>
> Nonsense. Go, check how many errata there was in the Core Duo. Just see the
> example from the same site, from the comments from the article you quoted...
>
> http://techreport.com/forums/viewtopic.php?t=43352&view=next&sid=a3a9...
>
There are mistakes, and there are mistakes. This mistake is one that
AMD could not afford. Your idea that "errata happen" and that they're
all equivalent is interesting. I suggest that you buy some AMD
stock. It's a bargain right now.
Robert. >> Stay informed about: Clarifications about AMD TLB L3 bug |
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Since: Dec 06, 2007 Posts: 31
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(Msg. 11) Posted: Wed Dec 19, 2007 10:43 am
Post subject: Re: Clarifications about AMD TLB L3 bug [Login to view extended thread Info.] Archived from groups: per prev. post (more info?)
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On Dec 19, 11:53 am, Sebastian Kaliszewski
<s... RemoveThis @get.it.off.to.reply.informa.pl> wrote:
> Robert Myers wrote:
>
> > AMD bought it on this one. Perhaps AMD should have had
> > you go out and address investors. You'd have been a big hit.
>
> > Your comment that "both AMD & Intel fixes reduce the perofrmance [sic]
> > a bit" is like Yousuf coming out with the item about Intel's bug right
> > after the AMD bug, as if they canceled one another out. Go look at
> > the financial press,
>
> Whatever. Finacial press is a poor source of techical info.
>
You think the articles (and press releases) you get on the internet
are a *good* source of information?
Your contempt for markets is revealing. A stock price is the
cumulative opinion of many people who follow the stock and who wager
actual money (not usenet bandwidth) on their opinions. The United
States (in particular) has companies like Intel (and, yes, even AMD)
because it so efficiently predicts and rewards success and predicts
and punishes failure through market mechanisms.
Chattering away like this is an interesting pastime, but it doesn't
affect anything of importance. Even much less so now than it used
to. You may not think much of the dimwits who majored in management,
but they can buy and sell as many techies as they need to find out
what's going on.
> > and see if anyone but AMDroids (or anyone that
> > matters) reads it that way.
>
> Whatever. Such recalls do happen. It's a seruoius blow to AMD (as it delays
> their more competitive products and causes the to loose Christmast season),
> but such things are none the less reality and they do happen to everyone
> from time to time. AMD has still enough money to wether that one (with their
> current burning rate then can go for about 2 more years). And some of that
> buring is one time (ATI acquisition costs are big, but one time expense)
>
The question here is whether AMD will even survive. For one thing,
the stock is selling below book. That makes AMD a takeover target.
Would an AMD that was bought in a leveraged buyout continue the
ruinous war with Intel it's undertaken? I certainly hope not. Only
time will tell.
>
> > If you can't be bothered to read the entire thread,
>
> I did read it. That's the very reason i put the above BTW.
>
So your "BTW" was a me-too pile-on. Very impressive.
> > then I can't be
> > bothered to respond.
In the sense that I wasn't going to repeat what I'd already said on
the subject. You are a piece of work.
The sum of the opinion here is that it wishes to minimize the
seriousness of what has happened with AMD. If anyone here really
believes that, there is a serious opportunity to make a lot of money,
because, as I said, AMD is currently selling below it's book value.
There may be other things fueling the fire-sale prices. For example,
who wants to send out a quarterly report showing that they'd made a
bet on AMD? Things might not be *quite* as bad for AMD as the stock
price would indicate. You can find that sort of thing out in the
financial press, too.
Robert. >> Stay informed about: Clarifications about AMD TLB L3 bug |
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Since: Dec 06, 2007 Posts: 31
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(Msg. 12) Posted: Wed Dec 19, 2007 12:29 pm
Post subject: Re: Clarifications about AMD TLB L3 bug [Login to view extended thread Info.] Archived from groups: per prev. post (more info?)
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On Dec 19, 2:31 pm, a?n?g?...@lovergirl.lrigrevol.moc.com (The little
lost angel) wrote:
> On Fri, 14 Dec 2007 18:22:54 -0800 (PST), Robert Myers
>
> <rbmyers....RemoveThis@gmail.com> wrote:
> >You know that I'm not an admirer of AMD, so you won't be surprised
> >that I think AMD may be mortally wounded. Between the ATI fiasco and
> >this, AMD is a company with products that no one is going to want to
> >buy and seems unlikely to survive until it will have products that
> >someone does want to buy.
>
> Although it's a really bad piece of news for AMD, I'd have to disagree
> about it being a mortal wound. After all, I distinctively remember AMD
> prices once was at US$3+ back in the early days of the K7 which
> ironically was a comparatively better product than Intel's P3 then,
> and it's now still $7+. If AMD survived on a single key product back
> then and nobody bought over them at $3+, I don't see why they can't
> survive now with an overall stronger product portfolio and a share
> price double those times.
>
> Despite what you *claim* about nobody wanting to buy AMD products, I
> see regular messages about AMD/ATI 3850/3870 selling out locally.
> That's at least one wing that's still flying reasonably even if not
> outperforming the competition. The X2 processors are still selling due
> to their relatively cheap prices for the performance.
>
The "nobody wants to buy" is obvious hyperbole, but there is a really
big problem here that I actually haven't seen get much discussion.
AMD's huge win in the last few years has been to get Tier 1 vendors to
take them seriously. People stuck with Intel because they knew that
if they got burned, so would everyone else. Now those who have taken
a chance on Barcelona are in trouble in exact proportion as they
banked on AMD. The fact that I don't particularly admire AMD has
nothing to do with it. People don't want to take risks that won't pay
off. A bet on Opteron was a bet worth making, and it paid. What
corresponding bet does AMD have to offer now or in the forseeable
future that would justify vendors risking getting hung out to dry like
they just did? Why *would* anyone want to buy on a scale that will
matter to a company of AMD's size (and with the debt it has on its
balance sheet)?
> >That AMD is publicly whining about the
> >pounding its stock price has taken should tell you something. Vendors
> >who *finally* took a chance on AMD after years of hanging back have
> >been fried. First there was the lame roadmap. Now this.
>
> >What's the difference between this and Intel's botched FDIV bug?
> >Very, very simple. At the time of the FDIV bug, x86 was for
> >"peecees," and no one cared if Intel made mistakes that IBM (or DEC or
> >Sun) never would. Now they do.
>
> Actually, I think the real difference between the two is that nobody
> saw it was a mistake Intel couldn't recover from. However for AMD,
> this would look like a killing blow on top of the underwhelming
> performance against competition for a new product generation. While I
> vaguely remember outcry against Intel for that bug, I don't remember
> anybody saying that it's going to sink Intel. There just wasn't
> sufficient competition capacity to takeover a company with over 90% of
> the market share. Thus the difference in perceived impact.
>
There's an interesting argument that fixing the FDIV bug cost Intel
about what a major advertising campaign would cost. In other words,
the FDIV bug may have paid for itself in terms of public awareness of
what was then still very much a "peecee" processor. No similar fairy
dust is going to settle on AMD over Barcelona, which has gone from
being AMD's next big threat to Intel dominance to synonym for screw-up
and late delivery. The more fair comparison might be to Itanium,
except that Intel could afford its Itanium mistakes.
Maybe AMD will dance away from this one the way they've danced away
from so many disasters in the past. If they do, the secret is in
balance sheets and corporate deals; for example
http://news.bbc.co.uk/2/hi/technology/7149704.stm
Despite what the article says about Intel being about just one
product, almost no one in the business wants to see Intel with
essentially a monopoly on the technology at the end of the yellow
brick road.
Robert. >> Stay informed about: Clarifications about AMD TLB L3 bug |
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Since: Oct 16, 2007 Posts: 9
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(Msg. 13) Posted: Wed Dec 19, 2007 2:02 pm
Post subject: Re: Clarifications about AMD TLB L3 bug [Login to view extended thread Info.] Archived from groups: per prev. post (more info?)
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Robert Myers wrote:
>>>As I'm sure you know, I wasn't aware of the follow-up article.
>>
>>Don't use such lame excuses.
>
> When you've grown up, you'll know better than to talk to people that
> way, especially to people you don't know.
Don't be silly. Quoting you from the very same thread:
[quote]
If you can't be bothered to read the entire thread,
then I can't be
bothered to respond.
[/quote]
So, you in the very same thread:
a) falsely accuse others of not reading the things they're discussing (it
did read LL's answer
b) excuse yourself by not reading the things you're dicussing
At least be consistent on short time-scale!
>>>Somewhere, there might be a customer who matters who would apply such
>>>an "invasive" patch without support. Who or where that customer might
>>>be is beyond my imagining, except that someone important must have a
>>>bunch of these AMD chips installed somewhere and has no choice but to
>>>take the chance. So,
>>
>>>1. We rushed a chip into production and missed an infrequently-
>>>occurring but potentially disastrous bug.
>>
>>>2. We are now rushing out a patch that purports to fix the bug without
>>>a serious penalty. We told you to trust us about the chip, and it
>>>turns out you shouldn't have. Now we're telling you *not* to trust us
>>>about the patch. Why, exactly, would anyone install the unsupported
>>>patch? Presumably there is a handful of important customers whose
>>>hands are being held. For everyone else, it's just PR.
>>
>>Nonsense. Go, check how many errata there was in the Core Duo. Just see the
>>example from the same site, from the comments from the article you quoted...
>>
>>http://techreport.com/forums/viewtopic.php?t=43352&view=next&sid=a3a9...
>
> There are mistakes, and there are mistakes. This mistake is one that
> AMD could not afford.
Because our great all-knowing Robert Myers said so...
> Your idea that "errata happen" and that they're
> all equivalent is interesting. I suggest that you buy some AMD
> stock. It's a bargain right now.
Yeah, the old stockshill, johncorsish note.
I'd like to remind you, this is a technical group not stock talk BS forum...
rgds
\SK >> Stay informed about: Clarifications about AMD TLB L3 bug |
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Since: Oct 16, 2007 Posts: 9
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(Msg. 14) Posted: Wed Dec 19, 2007 2:02 pm
Post subject: Re: Clarifications about AMD TLB L3 bug [Login to view extended thread Info.] Archived from groups: per prev. post (more info?)
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Robert Myers wrote:
>>>What's the difference between this and Intel's botched FDIV bug?
>>>Very, very simple. At the time of the FDIV bug, x86 was for
>>>"peecees," and no one cared if Intel made mistakes that IBM (or DEC or
>>>Sun) never would. Now they do.
>>
>>What a nonsense!
>>
>>You know what is the difference?
>>There is a workaround for this AMD bug, like there are for Inte's TLB bus in
>>their Core2 Duos. Both AMD & Intel fixes reduce the perofrmance a bit.
>
> The workaround costs anywhere from 5% (one of AMD's numbers) to 50%
> (other's numbers, naturally) in performance.
Yeah, sure. Maybe it's 200%! Or maye 199929292%...
It may be 50% in some artificial test.
> You think that's
> acceptable?
Whatever. It's going to be fixed as many eralier bug from both Amd & Intel
(and Dec & IBM & Sun &...)
> AMD bought it on this one. Perhaps AMD should have had
> you go out and address investors. You'd have been a big hit.
>
> Your comment that "both AMD & Intel fixes reduce the perofrmance [sic]
> a bit" is like Yousuf coming out with the item about Intel's bug right
> after the AMD bug, as if they canceled one another out. Go look at
> the financial press,
Whatever. Finacial press is a poor source of techical info.
> and see if anyone but AMDroids (or anyone that
> matters) reads it that way.
Whatever. Such recalls do happen. It's a seruoius blow to AMD (as it delays
their more competitive products and causes the to loose Christmast season),
but such things are none the less reality and they do happen to everyone
from time to time. AMD has still enough money to wether that one (with their
current burning rate then can go for about 2 more years). And some of that
buring is one time (ATI acquisition costs are big, but one time expense)
>>You know what is the difference? There was no fix for FDIV bug at all.
>>Reducing performance slightly or not. The buggy stuff was hard coded and not
>>bypassable. Intel has learned from that disaster and AMD has too.
>>
>>>>>2. TRUTH: A fix is available under NDA for RHEL 4 and not otherwise
>>>>>apparently.
>>
>>>>>http://techreport.com/discussions.x/13721
>>
>>>>>http://techreport.com/discussions.x/13724
>>
>>>>How secret can it be if it's open-source?
>>
>>>How is part of SUSE kept proprietary?
>>
>>Go buy a little clue and read how GPL works. Then you'll know that parts
>>which are not derived work of the GPL Linux kernel can be proprietary and
>>how those which are dervied work (as such patch has to) can not.
>>
>>BTW. The patch is public, so the point is moot, you're just spreading
>>unfounded FUD.
>
> If you can't be bothered to read the entire thread,
I did read it. That's the very reason i put the above BTW.
> then I can't be
> bothered to respond.
Yet you responded
Your response is practically empty (of course), but it's here.
rgds
\SK >> Stay informed about: Clarifications about AMD TLB L3 bug |
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Since: Mar 10, 2004 Posts: 318
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(Msg. 15) Posted: Wed Dec 19, 2007 5:02 pm
Post subject: Re: Clarifications about AMD TLB L3 bug [Login to view extended thread Info.] Archived from groups: per prev. post (more info?)
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On Fri, 14 Dec 2007 18:22:54 -0800 (PST), Robert Myers
<rbmyersusa.RemoveThis@gmail.com> wrote:
>You know that I'm not an admirer of AMD, so you won't be surprised
>that I think AMD may be mortally wounded. Between the ATI fiasco and
>this, AMD is a company with products that no one is going to want to
>buy and seems unlikely to survive until it will have products that
>someone does want to buy.
Although it's a really bad piece of news for AMD, I'd have to disagree
about it being a mortal wound. After all, I distinctively remember AMD
prices once was at US$3+ back in the early days of the K7 which
ironically was a comparatively better product than Intel's P3 then,
and it's now still $7+. If AMD survived on a single key product back
then and nobody bought over them at $3+, I don't see why they can't
survive now with an overall stronger product portfolio and a share
price double those times.
Despite what you *claim* about nobody wanting to buy AMD products, I
see regular messages about AMD/ATI 3850/3870 selling out locally.
That's at least one wing that's still flying reasonably even if not
outperforming the competition. The X2 processors are still selling due
to their relatively cheap prices for the performance.
>That AMD is publicly whining about the
>pounding its stock price has taken should tell you something. Vendors
>who *finally* took a chance on AMD after years of hanging back have
>been fried. First there was the lame roadmap. Now this.
>
>What's the difference between this and Intel's botched FDIV bug?
>Very, very simple. At the time of the FDIV bug, x86 was for
>"peecees," and no one cared if Intel made mistakes that IBM (or DEC or
>Sun) never would. Now they do.
Actually, I think the real difference between the two is that nobody
saw it was a mistake Intel couldn't recover from. However for AMD,
this would look like a killing blow on top of the underwhelming
performance against competition for a new product generation. While I
vaguely remember outcry against Intel for that bug, I don't remember
anybody saying that it's going to sink Intel. There just wasn't
sufficient competition capacity to takeover a company with over 90% of
the market share. Thus the difference in perceived impact.
--
A Lost Angel, fallen from heaven
Lost in dreams, Lost in aspirations,
Lost to the world, Lost to myself >> Stay informed about: Clarifications about AMD TLB L3 bug |
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