Slacker wrote:
> I've been reading up lately in preparation for buying a new system, but
> there are a lot of things you are apprently just supposed to know already. I
> suspect I know the answer to some of these already, but just in case...
>
> Are all P4 800Mhz processors dual channel?
'Dual channel' is a function of how the chipset handles memory, not the
processor.
> Does dual channel memory have to be installed in pairs?
Yes, or else there's only one channel.
> If so, does the
> memory have to be 'paired' to work effectively?
They have to be 'paired' in that they must be the same size and have the
same characteristics but they do not have to be pre 'matched' by the
seller, although that should certainly remove any 'doubt' about it.
> Does lower latency memory help automatically, or must some settings be
> changed in BIOS?
The BIOS should read the SPD on the memory module and set it accordingly
(meaning automatically).
> What is registered memory?
'Registered' means there is are registers (buffers) on the memory module
between the actual RAM and the data bus. That allows more memory modules to
be on the bus (each module adds a 'load' and the register can drive a
larger load than the bare memory can) but it also introduces a delay (has
to propagate through the register) so they will generally not clock as fast.
> What is the approximate performance penalty for using ECC (in percentages)?
Like most things it depends on what you're doing but the bigger hit, about
15%, comes from registered (which ECC will most likely be too). Take a look
here:
<a style='text-decoration: underline;' href="http://www.2cpu.com/articles/44_1.html" target="_blank">http://www.2cpu.com/articles/44_1.html</a>
Frankly, I doubt either are justified on a home PC.
>
> I've read a couple of times that lower CAS and RAS latencies make memory
> access quicker, but don't increase bandwidth. How can lower latencies not
> lead to higher bandwidths?
You're thinking of 'how fast is the whole ball of wax' but they're being
'technical' and using 'bandwidth' to mean the burst data rate (which is
what the BIG NUMBERS on the box refer to, e.g. PC3200 [Mbytes/sec]) and
latency to be how long it takes before a 'burst' can occur. None of the
memory types can actually do a continuous data stream at the burst rate
everyone sees on the box: it's 'make-request, wait, burst-data-set,
make-request, wait, burst-data-set', etc.<!-- ~MESSAGE_AFTER~ -->
>> Stay informed about: Some memory questions